mitsubishi memory card static ram cards mitsubishi electric 1 /9 8/16-bit data bus static ram card connector type two- piece 68-pin description mitsubishi?s static ram cards provide large memory capacities on a device approximately the size of a credit card(85.6mm 54mm 5.0mm). the cards use an 8/16 bit data bus.the devices use a replaceable lithium battery to maintain data.available in 8mbyte capacities, mitsubishi?s static ram cards are available with a 68-pin, two-piece connector. features n uses tsop (thin small outline package) to achieve very high memory density coupled with high reliability, without enlarging card size. mf38m1-lcdagxx MF38M1-LSDAGXX n electrostatic discharge protection to 15kv n buffered interface n 68pin connector n 8-bit and 16-bit data width n write protect switch n battery voltage pin n ls type wide range operating temperature (ta= -20 to 70c) application s n office automation n industrial n data communication n telecommunications n computers n consumer product list item memory data bus attribute auxialiary memory outline main battery type name capacity width(bits) memory battery organization drawing holder mf38m1-lcdagxx 8mb 8/16 no no 4m bit sram 16 68p-010 screw type MF38M1-LSDAGXX 8mb 8/16 no no 4m bit sram 16 68p-010 screw type
mitsubishi memory card static ram cards mitsubishi electric 2 /9 pin assignment two-piece type (68-pin) pin pin no. no. 1 gnd ground 35 gnd ground 2 d3 36 cd1# card detect 1 3 d4 37 d11 4 d5 data i/o 38 d12 5 d6 39 d13 data i/o 6 d7 40 d14 7 ce1# card enable 1 41 d15 8 a10 address input 42 ce2# card enable 2 9 oe# output enable 43 nc 10 a11 44 nc no connection 11 a9 45 nc 12 a8 address input 46 a17 13 a13 47 a18 14 a14 48 a19 address input 15 we# write enable 49 a20 16 nc no connection 50 a21 17 v cc power supply voltage 51 v cc power supply voltage 18 nc no connection 52 nc no connection 19 a16 53 a22 address input 20 a15 54 nc 21 a12 55 nc 22 a7 56 nc 23 a6 57 nc no connection 24 a5 address input 58 nc 25 a4 59 nc 26 a3 60 nc 27 a2 61 reg# reg function 28 a1 62 bvd2 battery voltage detect 2 29 a0 63 bvd1 battery voltage detect 1 30 d0 64 d8 31 d1 data i/o 65 d9 data i/o 32 d2 66 d10 33 wp write protect 67 cd2# card detect 2 34 gnd ground 68 gnd ground write protect mode (wp) when the write protect switch is switched on, this card goes into a write protect mode that can read but not write data. in this mode, wp pin becomes ?h? level. at the shipment the write protect switch is switched off (normal mode : the card can be written ; wp pin indicates ?l? level). symbol symbol function function
mitsubishi memory card static ram cards mitsubishi electric 3 /9 block diagram (8mb) function table mode reg# ce1# ce2# oe# we# a0 i/o (d15~d8) i/o (d7~d0) i cc standby x h h x x x high-impedance high-impedance standby read a (16bit) common h l l l h x odd byte data out even byte data out active write a (16bit) common h l l h l x odd byte data in even byte data in active read b (8bit) common h l h l h l high-impedance even byte data out active h l h l h h high-impedance odd byte data out active write b (8bit) common h l h h l l high-impedance even byte data in active h l h h l h high-impedance odd byte data in active read c (8bit) common h h l l h x odd byte data out high-impedance active write c (8bit) common h h l h l x odd byte data in high-impedance active output disable x x x h h x high-impedance high-impedance active read a (16bit) attribute l l l l h x data out (unknown) data out (ffh) active read b (8bit) attribute l l h l h l high-impedance data out (ffh) active l l h l h h high-impedance data out (unknown) active read c (8bit) attribute l h l l h x data out (unknown) high-impedance active note 1 : h=v ih , l=v il, x=v ih or v il a22 a21 a20 a0 a19 a18 a17 a16 a15 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 bvd2 we# oe# ce1# ce2# reg# wp# write rotect on off cd1# cd2# 19 16 br2325 v cc voltage detector & power controller mode control logic address- bus buffers address- decoder common memory 4mbit sram 16 cs# data-bus buffers gnd oe# we# to internal power supply 16 bvd1
mitsubishi memory card static ram cards mitsubishi electric 4 /9 absolute maximum ratings symbol parameter conditions ratings unit v cc supply voltage -0.3~6.0 v vi input voltage with respect to gnd -0.3~v cc +0.3 v v o output voltage 0~v cc v t opr1 operating temperature 1 read, write, operation lc series 0~70 c ls series -20~70 c t opr2 operating temperature 2 data retention lc series 0~70 c ls series -20~70 c t stg storage temperature -30~80 c recommended operating conditions (lc series ta= 0~55c, unless otherwise noted) (ls series ta=-20~70c, unless otherwise noted) limits min. typ. max. v cc v cc supply voltage 4.50 5.0 5.25 v gnd system ground 0 v v ih high input voltage 3.5 v cc v v il low input voltage 0 0.8 v electrical characteristics (lc series ta= 0~55c, v cc =4.50~5.25v, unless otherwise noted) (ls series ta=-20~70c, v cc =4.50~5.25v, unless otherwise noted) limits min. typ. max. v oh high output voltage i oh =-1.0ma, other outputs 2.4 v v ol low output voltage i ol =2ma 0.4 v i ih high input current v i =v cc v 10 a i il low input current v i =0v ce1#, ce2#, we#, oe#, reg# -10 -70 a other inputs -10 i ozh high output current ce1#=ce2#=v ih or oe#=v ih we#=v ih , 10 a in off state v o =v cc i ozl low output current ce1#=ce2#=v ih or oe#=v ih we#=v ih , -10 a in off state v o =0v i cc 1 ? 1 active supply ce#=v il , other inputs v ih or 16bit 280 ma current 1 v il ,outputs=open 8bit 200 i cc 1 ? 2 active supply ce# 0.2v, other inputs 16bit 270 ma current 2 0.2v or 3 v cc -0.2v, outputs=open 8bit 190 i cc 2 ? 1 standby supply current 1 ce1#=ce2#=v ih other inputs=v ih or v il 10 ma i cc 2 ? 2 standby supply current 2 ce1#=ce2# 3 v cc -0.2v other inputs 0.2v or 3 v cc -0.2v 1 ma vbdet1 battery detect vcc=5v,ta=25 c v reference voltage 1 ? vbdet 2 battery detect vcc=5v,ta=25 c v reference voltage 2 ? note 2 : currents flowing into the ic are taken as positive (unsigned). 3 : typical values are measured at v cc =5v, ta=25c. ? pin asserted when battery voltage drops below specified level. unit 2.37 2.65 symbol parameter unit 2.75 2.47 2.55 2.27 symbol parameter test conditions
mitsubishi memory card static ram cards mitsubishi electric 5 /9 capacitance limits min. typ. max. c i input capacitance v i =gnd, v i =25mvrms 30 pf f=1 mh z , ta=25c c o output capacitance v o =gnd, v o =25mvrms f=1 mh z , ta=25c 20 pf note 4 : these parameters are not 100% tested. switching characteristics read cycle (lc series ta= 0~55c, v cc =4.50~5.25v, unless otherwise noted) (ls series ta=-20~70c, v cc =4.50~5.25v, unless otherwise noted) limits symbol parameter min. typ. max. unit t cr read cycle time 200 ns t a (a) address access time 200 ns t a (ce) card enable access time 200 ns t a (oe) output enable accese time 100 ns t dis (ce) output disable time (from ce#) 90 ns t dis (oe) output disable time (from oe#) 90 ns t en (ce) output enable time (from ce#) 5 ns t en (oe) output enable time (from oe#) 5 ns t v (a) data valid time (after address change) 0 ns timing requirements write cycle (lc series ta= 0~55c, v cc =4.50~5.25v, unless otherwise noted) (ls series ta=-20~70c, v cc =4.50~5.25v, unless otherwise noted) limits symbol parameter min. typ. max. unit t cw write cycle time 200 ns t w(we) write pulse width 120 ns t su(a) address set up time 20 ns t su(a-weh) address set up time with respect to we# high 140 ns t su(ce-weh) card enable set up time with respect to we# high 140 ns t su(d-weh) data set up time with respect to we# high 60 ns t h(d) data hold time 30 ns t rec(we) write recovery time 30 ns t dis(we) output disable time (from we#) 90 ns t dis(oe) output disable time (from oe#) 90 ns t en(we) output enable time (from we#) 5 ns t en(oe) output enable time (from oe#) 5 ns t su(oe-we) oe# set up time with respect to we# low 10 ns t h(oe-we) oe# hold time with respect to we# high 10 ns symbol unit parameter test conditions
mitsubishi memory card static ram cards mitsubishi electric 6 /9 timing diagram read cycle we#=?h? level reg#=?h? level note 5 : indicates the don?t care input write cycle (we# control) reg#=?h? level t cr t a (a) ta (ce) ten (ce) ten (oe) tdis (oe) t v(a) ta (oe) output valid hi-z t dis(ce) an v ih dm (d out ) v oh v ol oe# v ih v il ce# v ih v il v il dm (d out ) v oh v ol hi-z t en(oe) t cw t su(ce-weh) t su(a-weh) t su(a) th (oe-we) v ih v il an t w(we) t su(oe-we) ce# v ih v il t dis(oe) t dis(we) dm (d in ) v ih v il v il we# v ih oe# v ih v il t rec(we) t h(d) t su(d-weh) t en(we) data input stable hi-z
mitsubishi memory card static ram cards mitsubishi electric 7 /9 write cycle (ce# control) oe#= ?h? level reg#=?h? level switching characteristics (attribute) read cycle (lc series:ta=0~55c, v cc =4.50~5.25v, unless otherwise noted) (ls series ta=-20~70c, v cc =4.50~5.25v, unless otherwise noted) limits symbol parameter min. typ. max. unit t cr r read cycle time 300 ns t a(a) r address access time 300 ns t a(ce) r card enable access time 300 ns t a(oe) r output enable access time 150 ns t dis(ce) r output disable time (from ce#) 100 ns t dis(oe) r output disable time (from oe#) 100 ns t en(ce) r output enable time (from ce#) 5 ns t en(oe) r output enable time (from oe#) 5 ns t v(a) r data valid time after address change 0 ns t cw t su(ce-weh) v ih v il an ce# v ih v il dm (d in ) v ih v il v il we# v ih t su(a) t rec(we) t h(d) t su(d-weh) data input stable hi-z
mitsubishi memory card static ram cards mitsubishi electric 8 /9 timing diagram (attribute) read cycle we#=?h? level reg#=?l? level note 6 : test conditions input pulse levels : v il =0.4v, v ih =4.0v input pulse rise, fall time : tr=tf=10ns reference voltage input : v il =0.8v, v ih =3.5v output : v ol =0.8v, v oh =3.0v (ten and tdis are measured when output voltage is 500mv from steady state. ) load : 100pf+1 ttl gate 5pf+1 ttl gate (at ten and tdis measuring) 7 : writing is executed in overlap of ce# and we# are ?l? level. (only for common memory) 8 : don?t apply inverted phase signal externally when dm pin is in output mode. 9 : ce# is indicated as follows: read a/write a : ce#=ce1#=ce2# read b/write b : ce#=ce1#, ce2#=?h? level read c/write c : ce#=ce2#, ce1#=?h? level t cr r t a (a) r ta (ce) r ten (ce) r ten (oe) r tdis (oe) r t v(a) r ta (oe) r output valid hi-z t dis(ce) r an v ih dm (d out ) v oh v ol oe# v ih v il ce# v ih v il v il
mitsubishi memory card static ram cards mitsubishi electric 9 /9 electrical characteristics battery backup (lc series ta= 0~55c, unless otherwise noted) (ls series ta=-20~70c, unless otherwise noted) limits symbol parameter test conditions min. typ. max. unit v batt back-up enable battery voltage all pins open 2.6 v v i(ce) card enable voltage 2.4v v cc 5.25v 2.4 v 0v v cc < 2.4v v cc -0.1 v cc vcc+0.1 all pins open, i cc (bup) battery back-up supply current v batt =3v, 17 m a ta=25c i cc (bup) battery back-up supply current all pins open, 400 m a v batt =3v timing requirements (lc series ta= 0~55c, unless otherwise noted) (ls series ta=-20~70c, unless otherwise noted) limits symbol parameter min. typ. max. unit t pr power supply rise time 0.1 300 ms t pf power supply fall time 3 300 ms t su(vcc) setup time at power on 20 ms t rec(vcc) recovery time at power off 1000 ns card insertion/removal timing diagram v cc min means minimum operating voltage=4.50v. note 10: when the card is holding valuable data, the battery must not be removed unless v cc is present. battery specifications a replaceable battery (type br2325) with a capacity of 165mah is used: estimated battery life when the card is left continuously. mf38m1-lc/lsdagxx 1.0years conditions temperature : 25 c humidity : 60%rh t rec(v cc ) t pf 90% vih 10% v cc ce1#, ce2# t su(v cc ) t pr 90% vih 10% v cc ce1, ce2 v cc min v cc min
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